DRV2700 Piezo Driver

DRV2700 is a single chip Piezo driver which is 4 mm x 4 mm x 0.9 mm in size. It can be used in 100 V boost or 1 kV flyback configuration. Supply voltage is 3 V - 5.5 V. In this article, evaluation of DRV2700EVM module is discussed.

Figure. Testing DRV2700.

The following figure illustrate boost + amplifier configuration of DRV2700.

Figure. DRV2700 boost + amplifier configuration.

Where BST is boost output voltage. BST is used as supply voltage (PVDD) for the amplifier. EN is chip enable. FB is boost feedback used together with R_FB1 and R_FB2 to produce required boost voltage. V_FB = 1.3 V and,the relation between R_FB1, R_FB2, and V_BST in boost + amplifier configuration is as follow.
$$ \begin{equation} V_{BST}=V_{FB}\left( 1+ \frac{R_{FB1}}{R_{FB2}} \right) \end{equation} $$ For example, if we want V_BST of 105 V, we can use R_FB1 = 806 kΩ and R_FB2 = 10.1 kΩ. When R_FB1 = 806 kΩ and R_FB2 = 16.45 kΩ, V_BST will be 65 V. Jumper settings and V_BST table for Evaluation module DRV2700EVM is shown below.

Figure. BST Setting Based on the Jumper Configuration.

GAIN0 and GAIN1 pins define the gain of amplifier which is ( \( \frac{OUT^+-OUT^- }{IN^+-IN^-}\) ).

Table. Amplifier gain

GAIN[1:0]	GdB	GAMP
00	28.8	27.54
01	34.8	54.95
10	38.4	83.18
11	40.7	108.4

The performance of DRV2700 largely depends on the choice of inductor also. The recommended values for the inductor is between 3.3 μH and 22 μH. In general, the smaller the inductance, the higher the saturation current limit. When a large inductance value is used, DRV2700 will automatically switch to lower switching frequency which gives smaller switching losses. On the other hand, it will has higher parasitic inductor losses. Typically, smaller inductance values are used to obtain higher current limit. In this evaluation module, 4.7 μH, 2.7 A inductor is used.

REXT is used to limit boost current by connecting a resistor to ground. The value of resistor should be between 6 kΩ and 35 kΩ. The relationship between Current limit ( \(I_{LIM}\) ) and resistor ( \(R_{EXT}\) ) is shown below, where K=10500, V_REF=1.35 V, and R_INT=60 Ω.

$$ \begin{equation} R_{EXT}=K.\frac{V_{REF}}{I_{LIM}}-R_{INT} \end{equation} $$
For example, when R_EXT=6.04 kΩ, I_LIM wil be 2.32 A. To obtain I_LIM = 1 A, the value of R_EXT should be 14 kΩ.

The minimum value of boost capacitor should be 50 nf. X7R type 100 nF capacitor is recommended. It is found that the lower the boost voltage, the better the efficiency. The efficiency at 80 V is around 50 % as shown in the following charts.

Figure. Typical characteristics.

A system example which uses DC coupled input is shown below.

Figure. DC coupled DAC input configuration.

A piezo element can be modeled as a capacitor. Then, the peak value for its load current - I_peak can be calculated as follow. $$ \begin{equation} I_{p}=2.\pi.f.C. V_{p} \end{equation} $$ If you want the value of peak supply current for DRV2700, I_DD, the voltage ratio, and efficiency - μ can be used to calculate as follow. $$ \begin{equation} I_{DD}=2.\pi.f.C. V_{p}.\frac{V_{BST}}{V_{DD}.\mu} \end{equation} $$ For example, Stack Multilayer Piezo Actuator, PICMA P-885.91 (Physik Instrumente, Karlsruhe, Germany) has capacitance 3.1 μF and travel range 32 μm. For V_p= 50 V and frequency 10 Hz, I_peak is 9.7 mA. Using V_BST= 105 V, V_DD= 3.3 V, and efficiency μ=45%, peak I_DD is obtained as 689 mA.

As an another example, Noliac plate stack actuator NAC2003-H50-A01 has capacitance 24620 nF and travel range 72 μm. For V_p= 30 V and frequency 10 Hz, I_peak is 46.4 mA. Using V_BST= 65 V, V_DD= 3.3 V, and efficiency μ=55%, peak I_DD will be 1.66 A.

DRV2700 is compared against DRV8662 which is used in PDu100D. For Piezo actuator with large capacitive load, DRV2700 is said to be more suitable.

Figure. pDu100B

To reduce noise at output voltage, output resistor R_o is normally used to connect piezo element in series. Bandwidth is same as that of first order RC low pass filter. $$ \begin{equation} f_{c}=\frac{1}{2.\pi.R_o.C} \end{equation} $$ The result of comparison between these two piezo drivers is shown below.

Table. Driving NAC2003-H50-A01, 25 μF with 60V peak to peak sinusoidal @ V_BST= 60 V, V_DD= 5 V, R_o= 1 kΩ

Driver	DC	1 Hz	10 Hz
DRV2700	13.5 mA	10 ~ 110 mA	170 ~ 250 mA
pDu100B	33 mA	30 ~ 130 mA	200 ~ 300 mA

Table. Driving PICMA P-885.91, 3 μF with 60V peak to peak sinusoidal @ V_BST= 100 V, V_DD= 5 V, R_o= 1 kΩ

Driver	DC	1 Hz	10 Hz
DRV2700	34 mA	32 ~ 57 mA	120 ~ 167 mA
pDu100B	73 mA	80 ~ 125 mA	160 ~ 220 mA

I have designed a 3 channel piezo driver which is shown in the following figure. It uses three DRV2700. It is 4 layered PCB with only 6 mm x 69 mm in size.